How to get the free protocols:

The instructions to apply for the free protocols are published in zeroplus website

The verification code is in the back of the logic analyzer. If your device does not have the verification code printed, then send us an email to zeroplus@nkcelectronics.com

Interface	USB 2.0 (1.1)
Operating System	98SE/ME/2000/XP/VISTA
Power Supply	USB 1.1 (USB 2.0 Recommended)
Channels	16
Bandwidth	75MHz
Memory Depth (Per Channel)	32Kbits
Memory	512Kbits
Internal Clock Rate (async)	100Hz - 100MHz
Max External Clock (sync)	75MHz
Trigger Channels	16 Channels
Trigger Condition	Edge/Pattern
Pre-Trigger/Post-Trigger	Yes
Trigger Level	1 Level
Trigger Count	1-65535
Max Trigger Page	Max 8191
Filter Channel	16
Buses Data Decoded	Yes
Enable Delay	Start: Edge and Pattern. End1-65535
Compression	16 Channel Compression 1-255

Electrical Specifications

	Minimum	Typical	Maximum
Working Voltage	DC 4.5V	DC 5.0V	DC 5.5V
Current at Rest			200 mA
Current at Work			400 mA
Power at Rest			1 W
Power at Work			2 W
Error in Phase Off			+/- 1.5 ns
Vinput of Testing Channels			+/- DC 30V
VReference	DC -6V		DC +6V
Input Resistance		500Kohm/10pF
Working Temperature	5 C		70 C
Storage Temperature	-40 C		80 C

Package Contents

Logic Analyzer	1
16-pin Testing Cable	0
8-pin Testing Cable	2
Probe	2
USB Cable	1
Getting Started Guide	0
Driver CD & Software	1
1-pin Testing Cable (hite)	1
2-pin Testing Cable (Black)	1
Built-In Protocols (Free)	SPI, IIC, 7-segment, UART
Optional Protocol add-ons	1-wire, HDQ, CAN 2.0B, SIGNIA 6210, USB 1.1, IIS, PS/2, Microwire, SSI, S/PDIF, LIN 2.1, Manchester, Miller, LCD1602, ST, IRDA, JTAG 2.0, ST7669, MOD, FLEXRAY 2.1A, DMX512, CCIR656, PCM, DSA, NEC PD6122, MII, Digital Logic, Arithmetic Logic, LCD 12864, PM 1.1, SM 2.0, PSB, SLE4442, AC97, 3-Wire, JK Flip-Flop, PECI, UpDownCounter, i2c (Serial EEPROM 24L Series)